martinhansen.ca

• Bachelor's and Master's degrees in Computer Engineering
• Positions in organizations such as Magnum Semiconductor, Motorola, and the University of Waterloo
• Work on various hardware projects in Verilog and VHDL, including FPGA emulation of a major chip design, and development of designs for consumer digital video applications
• Experience with various programming languages including C, C++, Java, Assembler, and Perl
• Two years of university-level teaching and lab supervision experience

• Low-level development: VHDL, Verilog, System Verilog, Assembler, embedded/real-time systems, multithreading, parallelism, memory management, processor architecture design, pipelining, Xilinx, Altera
• Programming languages: C, C++, Java, VHDL, Verilog, System Verilog, Assembler, Perl, Visual Basic, HTML, CSS, PHP, SQL, HOL, Modula-2, TCL, Pascal
• Logic and circuits: Linear and non-linear circuits, transistors, op-amps, finite state machines, formal verification, gate-level logic
• Project development: Coding, debugging, optimization, object oriented design, documentation, software and hardware testing, algorithm analysis

Hardware Engineering Contractor

• Ported full ASIC video processor chip design to FPGA emulation test environment

Teaching Staff (various positions)

• Appointed 17 times as a teaching assistant, TA mentor, report marker, and presentation marker
• Received an outstanding cumulative student feedback rating of 4.3 out of 5

Quality Assurance Engineer

• Developed and maintained software test tools using Visual Basic and Perl

Software Test Engineer

• Performed systems testing, and wrote scripts to automate the testing process

MASc in Computer Engineering

• CCECE, Vancouver: "A Hardware Implementation of Real-Time Video Deblocking Using Shifted Thresholding"
• GSRC, Waterloo: "Hardware Implementation of Efficient Image and Video Deblocking"

Certificate in University Teaching

BEng in Computer Engineering

• Computer systems option, coop program

• Porting large-scale video processing chip design for FPGA emulation (Verilog)
• Implementing an adaptive image decoder on an Altera FPGA (VHDL)
• Creating simple LCD and VGA interfaces for an Altera FPGA (VHDL)
• Creating a real-time video deblocker on an Altera FPGA (VHDL)
• Automated vehicle design using an existing (human) off-road vehicle (C++)
• Extending a pipelined CPU to a superscalar multi-threaded design (C)
• Building a simulator of multi-processor multi-threading (C++)